Semiconductor integrated circuits contain large numbers of electronic components such as diodes and transistors built on a single chip. Due to the microscopic scale of these circuits, they are susceptible to component defects due to material impurities and fabrication hazards.
In order to circumvent this problem, redundant components and/or circuits are built on every chip that can be switched-in in lieu of corresponding circuits found defective during testing. Usually the switching-out of a defective component or circuit and the switching-in of a corresponding redundant element is accomplished by using programing logic circuits which are activated by blowing certain fuses built into the chip circuitry.
FIG. 1 illustrates a typical fuse-controlled programing circuit of the prior art.
A bank 1 of N programming logic circuits 2 is interrogated by a latch pulse appearing on a latch pulse line 3 connected to control terminals of the logic circuits 2. Each programming logic circuit comprises a fuse 4 wired in series with a switching transistor 5 between a supply voltage VCC and its ground reference. The node 6 between the fuse and the switching transistor is wired into the input of a driver 7. The output of the driver is typically used to set a latching circuit which disables the defective circuit and enables a substitute from the redundant circuit bank. The latch pulse is allowed to pass through the programming logic circuit 2 only after the fuse 4 has been blown. So long as the fuse 4 short-circuits the node 6 to the reference ground the output of the driver 7 remains high regardless of the presence of the latch pulse on its control terminal. It should be noted that as long as the fuse 4 remains intact, current is drawn through it and through the switching transistor 5 during the period of every latch pulse. This type of programming logic circuit is commonly used in connection with memory chips wherein a latch pulse is usually issued with every memory cycle. As more programming logic circuits of this type are placed on a wafer and not programmed by blowing their fuses, the cumulative current drawn with every latch pulse occurring with every memory cycle can be significant and enough to affect the operation of the microcircuit.
A common solution found throughout the prior art to this problem is to pulse the programming logic circuit, i.e., issue a latch pulse, only once upon powering up the chip in order to latch-in the proper redundancy scheme or other control option. However, pulsing the circuits during the power up cycle does not guarantee that the proper redundancy or other option then set will not be unlatched sometime later during the operation of the chip as a result of a power surge, background noise or other form of transient. Without any other pulsing of the programming logic circuit until the next power up, there is no way the circuit can correct itself in such cases of spurious unlatching. Moreover, there is never any guarantee that the correct program can be latched-in with one single initial pulse. It is therefore preferable to issue a latch pulse with every memory cycle or multiples thereof to assure, not only a correct original latching-in of the programming scheme, but also an automatic correction of any spurious malfunction.
Accordingly, there is a need to find a palliative to the excessive drawing of current by banks of such programming logic circuits used to latch-in redundancy circuits and other programming options.